[
    {
        "CollectPEBSRecord": "2",
        "PublicDescription": "Counts requests to the Instruction Cache (ICache)  for one or more bytes in an ICache Line and that cache line is not in the ICache (miss).  The event strives to count on a cache line basis, so that multiple accesses which miss in a single cache line count as one ICACHE.MISS.  Specifically, the event counts when straight line code crosses the cache line boundary, or when a branch target is to a new line, and that cache line is not in the ICache.",
        "EventCode": "0x80",
        "Counter": "0,1,2,3",
        "UMask": "0x2",
        "PEBScounters": "0,1,2,3",
        "EventName": "ICACHE.MISSES",
        "PDIR_COUNTER": "na",
        "SampleAfterValue": "200003",
        "BriefDescription": "Counts requests to the Instruction Cache (ICache) for one or more bytes in a cache line and they do not hit in the ICache (miss)."
    },
    {
        "CollectPEBSRecord": "2",
        "PublicDescription": "Counts requests to the Instruction Cache (ICache) for one or more bytes in an ICache Line.  The event strives to count on a cache line basis, so that multiple fetches to a single cache line count as one ICACHE.ACCESS.  Specifically, the event counts when accesses from straight line code crosses the cache line boundary, or when a branch target is to a new line.",
        "EventCode": "0x80",
        "Counter": "0,1,2,3",
        "UMask": "0x3",
        "PEBScounters": "0,1,2,3",
        "EventName": "ICACHE.ACCESSES",
        "PDIR_COUNTER": "na",
        "SampleAfterValue": "200003",
        "BriefDescription": "Counts requests to the Instruction Cache (ICache) for one or more bytes cache Line."
    }
]